//am29200f.h
//am29200 fields in memory mapped control registers
//19930803/wjvg

//dma control register
#define DMCT_CTI     (1<< 0)  //count terminate interrupt
#define DMCT_TTI     (1<< 1)  //TDMA terminate interrupt
#define DMCT_QEN     (1<< 4)  //queue enable
#define DMCT_CTE     (1<< 5)  //count terminate enable
#define DMCT_TTE     (1<< 6)  //TDMA terminate enable
#define DMCT_EN      (1<< 7)  //enable
#define DMCT_RW      (1<< 8)  //read/write
#define DMCT_UD      (1<< 9)  //transfer up/down
#define DMCT_ACS     (1<<19)  //assert chip select
#define DMCT_DRM     (1<<20)  //DMA request mode
#define DMCT_DRM_AL  (0<<20)  //active low
#define DMCT_DRM_AH  (1<<20)  //active high
#define DMCT_DRM_HL  (2<<20)  //high to low transition
#define DMCT_DRM_LH  (3<<20)  //low to high transition
#define DMCT_DW      (1<<22)  //data width
#define DMCT_DW_32   (0<<22)  //32 bits
#define DMCT_DW_8    (1<<22)  // 8 bits
#define DMCT_DW_16   (2<<22)  //16 bits
#define DMCT_DW_32AU (3<<22)  //32 bits, address unchanged
#define DMCT_DMAWAIT (1<<24)  //DMA wait states
#define DMCT_DMAEXT  (1<<31)  //DMA extend

//interrupt control
#define ICT_TXDI   (   1<< 5)  //transmit data interrupt
#define ICT_RXDI   (   1<< 6)  //receive data interrupt
#define ICT_RXSI   (   1<< 7)  //receive status interrupt
#define ICT_PPI    (   1<<11)  //parallel port interrupt
#define ICT_DMA1I  (   1<<13)  //dma channel 1 interrupt
#define ICT_DMA0I  (   1<<14)  //dma channel 0 interrupt
#define ICT_F_IOPI (   1<<16)  //faktor of io port interrupt bits
#define ICT_M_IOPI (0xff<<16)  //masker of io port interrupt bits
#define ICT_VDI    (   1<<27)  //video interrupt

//serial port control
#define SPCT_LOOP    (1<<26)  //loopback
#define SPCT_BRK     (1<<25)  //send break
#define SPCT_DSR     (1<<24)  //data set ready
#define SPCT_PARNO   (0<<19)  //no parity
#define SPCT_PARODD  (4<<19)  //odd parity
#define SPCT_PAREVEN (5<<19)  //even parity
#define SPCT_PAR1    (6<<19)  //parity always 1
#define SPCT_PAR0    (7<<19)  //parity always 0
#define SPCT_STP     (1<<18)  //stop bits-1
#define SPCT_F_BITS  (1<<16)  //faktor for word length
#define SPCT_M_BITS  (3<<16)  //masker for word length
#define SPCT_5BITS   (0<<16)  //5 bits
#define SPCT_6BITS   (1<<16)  //6 bits
#define SPCT_7BITS   (2<<16)  //7 bits
#define SPCT_8BITS   (3<<16)  //8 bits
#define SPCT_F_TMODE (1<< 8)  //faktor for transmit mode
#define SPCT_M_TMODE (3<< 8)  //masker for transmit mode
#define SPCT_TIDIS   (0<< 8)  //transmit interrupts disabled
#define SPCT_TIEN    (1<< 8)  //transmit interrupts enabled
#define SPCT_TIDMA0  (2<< 8)  //transmit interrupts via dma0
#define SPCT_TIDMA1  (3<< 8)  //transmit interrupts via dma1
#define SPCT_RSIE    (1<< 2)  //receive status interrupt enable
#define SPCT_F_RMODE (1<< 0)  //faktor for receive mode
#define SPCT_M_RMODE (3<< 0)  //masker for receive mode
#define SPCT_RIDIS   (0<< 0)  //receive interrupts disabled
#define SPCT_RIEN    (1<< 0)  //receive interrupts enabled
#define SPCT_RIDMA0  (2<< 0)  //receive interrupts via dma0
#define SPCT_RIDMA1  (3<< 0)  //receive interrupts via dma1

//serial port status
#define SPST_TEMT (1<<10)  //transmitter empty
#define SPST_THRE (1<< 9)  //transmit holding register empty
#define SPST_RDR  (1<< 8)  //receive data ready
#define SPST_DTR  (1<< 4)  //data terminal ready
#define SPST_BRKI (1<< 3)  //break interrupt
#define SPST_FER  (1<< 2)  //framing error
#define SPST_PER  (1<< 1)  //parity error
#define SPST_OER  (1<< 0)  //overrun error

#define baud2div(n) (32000000/32/(n)-1)  //baudrate to divisor
#define BAUD_9600   baud2div(9600)       //baudrate-factor for 9600 baud

//end