//m6811a.h
//definition of the 6811-hardware
//the addresses of the ports as constants
//19941004/wjvg

#define PORTA   0x00  //port a
#define RES_01  0x01  //reserved
#define PIOC    0x02  //pio
#define PORTC   0x03  //port c
#define PORTB   0x04  //port b
#define PORTCL  0x05  //
#define DDRB    0x06  //
#define DDRC    0x07  //reserved
#define PORTD   0x08  //port d data register
#define DDRD    0x09  //port d ddr
#define PORTE   0x0a  //
#define CFORC   0x0b  //force output compare
#define OC1M    0x0c  //
#define OC1D    0x0d  //
#define TCNT    0x0e  //timer count[2]

#define TIC1    0x10  //ic1 reg[2]
#define TIC2    0x12  //ic2 reg[2]
#define TIC3    0x14  //ic3 reg[2]
#define TOC1    0x16  //oc1 reg[2]
#define TOC2    0x18  //oc2 reg[2]
#define TOC3    0x1a  //oc3 reg[2]
#define TOC4    0x1c  //oc4 reg[2]
#define TOC5    0x1e  //oc5 reg[2]

#define TCTL1   0x20  //timer control 1
#define TCTL2   0x21  //timer control 2
#define TMSK1   0x22  //timer mask 1
#define TFLG1   0x23  //timer flag 1
#define TMSK2   0x24  //timer mask 2
#define TFLG2   0x25  //timer flag 2
#define PACTL   0x26  //  
#define PACNT   0x27  //
#define SPCR    0x28  //SPI CNTL REG  DWOM
#define SPSR    0x29  //
#define SPDR    0x2a  //
#define BAUD    0x2b  //sci baud reg
#define SCCR1   0x2c  //sci control1 reg
#define SCCR2   0x2d  //sci control2 reg
#define SCSR    0x2e  //sci status reg
#define SCDR    0x2f  //sci data reg

#define ADCTL   0x30  //
#define ADR1    0x31  //
#define ADR2    0x32  //
#define ADR3    0x33  //
#define ADR4    0x34  //
#define BPROT   0x35  //block protect reg
#define RES_36  0x36  //
#define RES_37  0x37  //
#define RES_38  0x38  //
#define OPTION  0x39  //option reg
#define COPRST  0x3a  //cop reset reg
#define PPROG   0x3b  //ee prog reg
#define HPRIO   0x3c  //hprio reg
#define INIT    0x3d  //
#define TEST1   0x3e  //
#define CONFIG  0x3f  //config register

//end