Build stuff yourself
An interesting e-mail
To: The 68hc11 mailing list
Subject: Re: CPU* schematics - VHDL
I would like to obtain some full-size (D or E size) digital logic
schematics for a typical CPU* or MCU*.
I realy don't think they exist; typical chip design is done with HDL's and
not schematic entry.
If you want to teach how chips are designed and how complex they can be
schematically, download the free versions of MAX-PLUS II and FPGA* EXPRESS
from Altera's web site.
Have the students open or start a new project based on the mult_hdl.vhd file
in FPGA* EXPRESS sample directory. Have them look at the simple entity
declaration in the source file:
entity mult is
Also have them check out the single behavioral statement in the architecture:
prod <= a*b;
a, b : in std_logic_vector(7 downto 0);
prod : out std_logic_vector(15 downto 0)
Then have them right click on the source file listing in the tree on the left
pane and select "Create Implementation...". Use the default auto target device
from the MAX 7000S series.
Two entries in the right pane will be created.
Then right click on the "mult-optimised" version in the right pane and select
This will show a high level block with the external pin connections. Double
click on that block and you will see the increasing complexity. You can
double click each block until you get to the gate level of each product term.
You will see that to perform a simple multiplication of two 8-bit values to a
16-bit result in hardware is more than any manual schematic entry method
could accomplish and still minimize the possibility of design errors.
This is why all students who are looking to get into hardware should be made
aware that the increasing demands and complexity of today's electronics
typically preclude the use of schematic entry in chip design.
In addition, there is an open source organization that is developing various
cores for use under an open source agreement. You may find the source for a
www.opencores.org. This is similar to the open source movement for operating
systems (ie Linux, Open/Free/NetBSD's, etc..) except that it involves HDLS
for various VLSI designs including MIPS*, RISC* and other IC*'s...
Interesting side note: on the IBM research site:
Go to PICA link on the right. This shows how photons going through the
junctions of a chip emit photons.
Click the demo link in the pop-up window you will find two example MPEGS. The
most interesting is the IBM S/390. Show your students how the clock
distributes and note the timer readout on the bottom left.
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